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All Papers  Key Papers by Topic 2017  2016  2015  2014  2013  2012  2011  2010  2009  2008  2007  2006  2005  2004  2003  2002  2001  2000  90s C.Greatwood, L.Bose, T.Richardson, W.Mayol, J.Chen, S.J.Carey and P.Dudek, "Agile control of a UAV by tracking with a parallel visual processor", IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS 2017, Vancouver, September 2017 J.N.P.Martel, L.K.Müller, S.J.Carey and P.Dudek "HighSpeed Depth from Focus on a Programmable Vision Chip Using a Focus Tunable Lens", IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, pp.11501153, May 2017 J.N.P.Martel, L.K.Müller, S.J.Carey, J.Müller, Y.Sandamirskaya and P.Dudek "Live Demonstration: Depth from Focus on a Focal Plane Processor Using a Focus Tunable Liquid Lens", IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, pp.17421743, May 2017 J.N.P. Martel, Y.Sandamirskaya and P.Dudek "A Demonstration of Tracking using Dynamic Neural Fields on a Programmable Vision Chip", Proceedings of the 10th International Conference on Distributed Smart Camera, ICDSC 2016, Paris, pp.212213, Sept 2016 J.N.P.Martel, L.K.Müller, S.J.Carey and P.Dudek, "Parallel HDR tone mapping and autofocus on a cellular processor array vision chip", IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal, pp.14301433, May 2016 J.N.P.Martel and P.Dudek, "Vision Chips with Inpixel Processors for Highperformance Lowpower Embedded Vision Systems", Workshop on Architectures and Systems for Realtime Mobile Vision Applications (ASRMOV), International Symposium on Code Generation and Optimization, CGO'16, March 2016 J.N.P.Martel, L.K.Müller, S.J.Carey and P.Dudek, "A realtime high dynamic range vision system with tone mapping for automotive applications", International Workshop on Cellular Neural Networks and Applications, CNNA 2016, Dresden, August 2016 M.V.Nair and P.Dudek, "Practical GradientDescent for Memristive Crossbars", International Conference on Memristive Systems, MEMRISYS 2015, November 2015 J.N.Martel, M.Chau, M.Cook and P.Dudek, "Pixel interlacing to trade off the resolution of a Cellular Processor Array against more registers", European Conference on Circuits Theory and Design, ECCTD 2015, pp.14, September 2015 M.V.Nair and P.Dudek, "Gradientdescentbased learning in memristive crossbar arrays", International Joint Conference on Neural Networks, IJCNN 2015, Killarney , pp.17, July 2015 D.Walsh and P.Dudek, "An EventDriven Massively Parallel FineGrained Processor Array", IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, pp.13461349, June 2015 J.N.Martel, M.Chau, P.Dudek and M.Cook, "Toward Joint Approximate Inference of Visual Quantities on Cellular Processor Arrays", IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, pp.20612064, June 2015 P.Mroszczyk and P.Dudek, "TriggerWave Asynchronous Cellular Logic Array for Fast Binary Image Processing". IEEE Transactions on Circuits and Systems  I: Regular Papers Vol 62, Issue 2, pp.497506, January 2015 P.Mroszczyk and P.Dudek, "Tunable CMOS Delay Gate With Improved Matching Properties". IEEE Transactions on Circuits and Systems  I: Regular Papers, Vol 61, Issue 9, pp.25862595, September 2014 S.Carey and P.Dudek, "Vision Chip with High Accuracy Analog S2I Cells", Workshop on Cellular Nanoscale Networks and Applications, CNNA 2014, Notre Dame, July 2014 B.Wang, P.Mroszczyk and P.Dudek, "A New Method for Fast Skeletonization of Binary Images on Cellular Processor Arrays", Workshop on Cellular Nanoscale Networks and Applications, CNNA 2014, Notre Dame, July 2014 D.Walsh and P.Dudek, "Object Sorting Using a Distributed Manipulator Array", Workshop on Cellular Nanoscale Networks and Applications, CNNA 2014, Notre Dame, July 2014 B.Wang and P.Dudek, "A Fast Selftuning Background Subtraction Algorithm". IEEE Change Detection Workshop (CDW2014) at IEEE Conference on Computer Vision and Patern Recognition, CVPR 2014, Columbus, 2328 June 2014 P.Mroszczyk and P.Dudek, "The Accuarcy and Scalability of ContinuousTime Bayesian Inference in Analogue CMOS Circuits", IEEE International Symposium on Circuits and Systems, ISCAS 2014, pp.15761579, Melbourne, June 2014 S.Carey, A.Zarandy and P.Dudek, "Characterization of processing errors on analog fullyprogrammable cellular sensorprocessor arrays", IEEE International Symposium on Circuits and Systems, ISCAS 2014, pp.15801584, Melbourne, June 2014 S.Carey, D.Barr, B.Wang, A.Lopich and P.Dudek, "Live Demonstration: A SensorProcessor Array Integrated Circuit for HighSpeed RealTime Machine Vision", IEEE International Symposium on Circuits and Systems, ISCAS 2014, pp.447447, Melbourne, June 2014 (Best Demo Award) I.Georgilas, A.Adamatzky, D.Barr, P.Dudek and C.Melhuish, "Metachronal waves in cellular automata: Cilialike manipulation in actuator arrays", Nature Inspired Cooperative Strategies for Optimisation (NICSO 2013), Studies in Computational Intelligence, Volume 512, 2014, pp 261271 S.J.Carey, D.R.W.Barr, B.Wang, A.Lopich and P.Dudek, "Mixed signal SIMD processor array vision chip for realtime image processing", Analog Integrated Circuits and Signal Processing, Vol 77, Issue 3, pp.385399, December 2013 S.J.Carey, D.R.W.Barr and P.Dudek, "Low Power HighPerformance Smart Camera System based on SCAMP Vision Sensor". Journal of Systems Architecture, Vol 59, Issue 10, Part A, pp.889899, November 2013 D.R.W. Barr, D.Walsh and P.Dudek, "A Smart Surface Simulation Environment", IEEE International Conference on Systems, Man and Cybernetics, SMC 2013, October 2013. P.Mroszczyk and P.Dudek, "TriggerWave Propagation in Arbitrary Metrics in Asynchronous Cellular Logic Arrays", European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, 812 September 2013 A.Lopich and P.Dudek, "A Generalpurpose Vision Processor with 160x80 PixelParallel SIMD Processor Array", IEEE Custom Integrated Circuits Conference, San Jose, California, 2325 September 2013 B.Wang and P.Dudek, "AMBER: Adapting Multiresolution Background Extractor", IEEE International Conference on Image Processing, ICIP 2013, Melbourne, Australia, 1518 September 2013 P.Mroszczyk and P.Dudek, "Tunable CMOS Delay Gate with Reduced Impact of Fabrication Mismatch on Timing Parameters", IEEE International NEWCAS Conference 2013, Paris, pp.14, June 2013. S.J.Carey, A.Lopich, D.R.W.Barr, B.Wang and P.Dudek, "A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array", VLSI Circuits Symposium 2013, Kyoto, pp.C182C183, June 2013 S.J.Carey, D.R.W.Barr, B.Wang, A.Lopich and P.Dudek, "Mixed signal SIMD cellular processor array vision chip operating at 30,000 fps", IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, pp. 324327, December 2012 T.Zhou, P.Dudek and B.E.Shi, "Development of robot selfidentification based on visuomotor prediction", 2012 IEEE International Conference on Development and Learning and Epigenetic Robotics (ICDL 2012), pages 12, November 2012 J.H.B.Wijekoon and P.Dudek, "VLSI circuits implementing computational models of neocortical circuits", Journal of Neuroscience Methods, Volume 210, Issue 1, pp.93109, September 2012 D.Walsh and P.Dudek, "A Compact FPGA Implementation of a BitSerial SIMD Cellular Processor Array", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2012, Turin, August 2012 B.Wang and P.Dudek, "Coarse Grain Mapping Method for Image Processing on Fine Grain Cellular Processor Arrays", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2012, Turin, August 2012 D.R.W.Barr, S.J.Carey and P.Dudek, "Low Power Multiple Object Tracking and Counting using a SCAMP Cellular Processor Array", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2012, Turin, August 2012 S.J.Carey, D.R.W.Barr, B.Wang, A.Lopich and P.Dudek, "Locating High Speed Multiple Objects using a SCAMP5 VisionChip", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2012, Turin, August 2012 J.H.B.Wijekoon and P.Dudek, "Heterogeneous Neurons and Plastic Synapses in a Reconfigurable Cortical Neural Network IC", IEEE International Symposium on Circuits and Systems, ISCAS 2012, pp. 24172420, Seoul, May 2012 P.Mroszczyk and P.Dudek, "TriggerWave Collision Detecting Asynchronous Cellular Logic Array for Fast Image Skeletonization", IEEE International Symposium on Circuits and Systems, ISCAS 2012, pp. 25632566, Seoul, May 2012, (Best Student Paper Award) D.Walsh and P.Dudek, "A field programmable array core for image processing", Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, pp. 266266, February 2012 A.Lopich and P.Dudek, "A SIMD Cellular Processor Array Vision Chip With Asynchronous Processing Capabilities", IEEE Transactions on Circuits and Systems  I, vol 58, issue 10, pp. 24202431, October 2011 A.Lopich and P.Dudek, "Architecture and Design of a Programmable 3DIntegrated Cellular Processor Array for Image Processing", IFIP/IEEE International Conference on Very Large Scale Integration, VLSISoc 2011, pp. 349353, Hong Kong, October 2011 A.Lopich and P.Dudek, "Asynchronous Cellular Logic Network as a CoProcessor for a GeneralPurpose Massively Parallel Array", International Journal of Circuit Theory and Applications, Volume 39, Issue 9, pages 963–972, September 2011 S.Carey, D.R.W.Barr and P.Dudek, "Demonstration of a Low Power Image Processing System using a SCAMP3 Vision Chip", ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC 2011, 2225 August 2011, Ghent T.Zhou, P.Dudek and B.Shi, "SelfOrganizing Neural Population Coding for Improving Robotic Visuomotor Coordination", International Joint Conference on Neural Networks, IJCNN 2011, pp. 14371444, San Jose, California, 31 July5 August 2011 G.Indiveri, B.LinaresBarranco, T.J.Hamilton, A.van Schaik, R.EtienneCummings, T.Delbruck, S.C.Liu, P.Dudek, P.Häfliger, S.Renaud, J.Schemmel, G.Cauwenberghs, J.Arthur, K.Hynna, F.Folowosele, S.Saighi, T.SerranoGotarredona, J.Wijekoon, Y.Wang and K.Boahen, "Neuromorphic Silicon Circuits", Frontiers in Neuroscience, 5:73. pp 123, doi: 10.3389/fnins.2011.00073, 2011 P.Dudek, “SCAMP3: A Vision Chip with SIMD Currentmode Analogue Processor Array”, in “FocalPlane SensorProcessor Chips” A.Zarandy (Ed.), ISBN: 9781441964748, p.1743, Springer, 2011 A.Lopich and P.Dudek, “ASPA: AsynchronousSynchronous Focal Plane Sensor Processor Chip”, in “FocalPlane SensorProcessor Chips” A.Zarandy (Ed.), ISBN: 9781441964748, p.73104, Springer, 2011 S.Carey, A.Lopich and P.Dudek, "A Processor Element for a Mixed Signal Cellular Processor Array Vision Chip", IEEE International Symposium on Circuits and Systems, ISCAS 2011, pp.15641567, Rio de Janeiro, May 2011 J.H.B.Wijekoon and P.Dudek, "Analogue CMOS Circuit Implementation of a Dopamine Modulated Synapse", IEEE International Symposium on Circuits and Systems, ISCAS 2011, pp.877880, Rio de Janeiro, May 2011 A.Lopich, D.Barr, B.Wang and P.Dudek, "RealTime Image Processing on ASPA2 Vision System", IEEE International Symposium on Circuits and Systems, ISCAS 2011, pp. 19891989, Rio de Janeiro, May 2011 (Best Demo Award) P.Abshire, A.Bermak, R.Berner, G.Cauwenberghs, S.Chen, J.B.Christen, T.Constandinou, E.Curulciello, M.Dandin, T.Datta, T.Delbruck, P.Dudek, A.Eftekhar, R.EtienneCummings, G.Indiveri, M.K.Law, B.LinaresBarranco, J.Tapson, W.Tang Y.Zhai, "Confession Session: Learning from Others Mistakes", IEEE International Symposium on Circuits and Systems, ISCAS 2011, Rio de Janeiro, pp 11491162, May 2011 A.Lopich, P.Dudek, "Cellular Processor Array Design in 3D Integrated Circuit Technology", Workshop on 3D integration, Design, Automation and Test in Europe, DATE 2011, Geneva, March 2011 K.Brohan, A.Cope, K.Gurney and P.Dudek, "Reinforcement learning in a selforganised representation of feature space", Tenth International Conference on Epigenetic Robotics, EpiRob 2010, Örenäs Slott, Sweden, 57 November 2010 K.Brohan, K.Gurney and P.Dudek, "Using reinforcement learning to guide the development of selforganised feature maps for visual orienting", Artificial Neural Networks  ICANN 2010, Lecture Notes in Computer Science, Volume 6353/2010, pp.180189, September 2010 A.Cope, J.Chambers, D.Barr, P.Dudek and K.Gurney, "Systems level model integration and embodiment: a case study with gaze control", Bernstein Conference on Computational Neuroscience, BCCN 2010, Berlin, September 2010 M.Laiho, E.Lehtonen, A.Russel and P.Dudek, "Memristive synapses are becoming reality", The Neuromorphic Engineer, 10.2417/1201011.003396, 26 November 2010 A.Lopich and P.Dudek, "An 80×80 generalpurpose digital vision chip in 0.18 μm CMOS technology", IEEE International Symposium on Circuits and Systems, ISCAS 2010, pp 42574260, May 2010 P.Dudek, A.Lopich and V.Gruev, “Vision Sensor with a SIMD Processor Array in a Vertically Stacked 3D Integrated Circuit Technology”, Workshop on 3D integration, Design, Automation and Test in Europe, DATE 2010, Dresden, March 2010. M.Geese and P.Dudek, "Autonomous Long Distance Transfer on SIMD Cellular Processor Arrays", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 365370, February 2010 (Best Paper Award) S.Mandal, B.Shi and P.Dudek, "Binocular Disparity Calculation on a MassivelyParallel Analog Vision Processor", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 285289, February 2010 S.Razmjooei and P.Dudek, "Approximating Euclidean Distance Transform with Simple Operations in Cellular Processor Arrays", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 181185, February 2010 Y.Wang, T.Wu, G.Orchard, P.Dudek, M.Rucci and B.Shi, "Hebbian Learning of Visually Directed Reaching by a Robot Arm", IEEE Biomedical Circuits and Systems Conference, BioCAS 2009, pp.205208, 2009 J.H.B.Wijekoon and P.Dudek, "A CMOS circuit implementation of a spiking neuron with bursting and adaptation on a biological timescale", IEEE Biomedical Circuits and Systems Conference, BioCAS 2009, pp.193196, December 2009 D.R.W.Barr and P.Dudek, "APRON: A Cellular Processor Array Simulation and Hardware Design Tool”, EURASIP Journal on Advances in Signal Processing, Article ID 751687, 9 pages, 2009 P.Dudek, A.Lopich and V.Gruev, “A pixelparallel cellular processor array in a stacked threelayer 3D silicononinsulator technology”, European Conference on Circuit Theory and Design, ECCTD 2009, pp.193197, August 2009 A.Lopich and P.Dudek, Hardware Implementation of Skeletonization Algorithm for Parallel Asynchronous Image Processing, Journal of Signal Processing Systems, Springer, Volume 56, Number 1, pp. 91103, July 2009 J.Harkin, F.Morgan, S.Hall. P.Dudek, T.Dowrick and L.McDaid, "Reconfigurable Platforms and the Challenges for LargeScale Implementations of Spiking Neural Networks", IEEE International Conference on Field Programmable Logic and Applications, FPL 2008, pp.483486, September 2008 D.R.W.Barr and P.Dudek, "A Cellular Processor Array Simulation and Hardware Prototyping Tool", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.213218, July 2008 (Best Paper Award) D.R.W.Barr and P.Dudek, "Demonstration of the APRON Processor Array Simulation Software", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.22, July 2008 D.Hillier and P.Dudek, "Implementing the Grayscale Wave Metric on a Cellular Array Processor Chip", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.120124, July 2008 C.AlonsoMontes, D.L.Vilariño, P. Dudek and M.G.Penedo, "Fast Retinal Vessel Tree Extraction: A Pixel Parallel Approach", International Journal of Circuit Theory and Applications, vol 36, issue 56, pp.641651, JulySeptember 2008 M.Huelse, D.R.W.Barr and P.Dudek, "Cellular Automata and Nonstatic Image Processing for Embodied Robot Systems on a Massively Parallel Processor Array", Automata2008, Theory and Applications of Cellular Automata, pp.504513, Luniver Press, 2008. J.H.B.Wijekoon and P.Dudek, "Integrated Circuit Implementation of a Cortical Neuron", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 17841788, May 2008 A.Lopich and P.Dudek, "ASPA: Focal Plane Digital Processor Array with Asynchronous Processing Capabilities", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 15921596, May 2008 D.L.Vilariño, P.Dudek, D.Cabello, "FocalPlane Moving Object Segmentation for RealTime Video Surveillance", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 16001603, May 2008 J.H.B.Wijekoon and P.Dudek, "Compact Silicon Neuron Circuit with Spiking and Bursting Behaviour", Neural Networks, Vol 21, Number 23, pp 524534, March/April 2008 A.Lopich and P.Dudek, "Implementation of an Asynchronous Cellular Logic Network as a CoProcessor for a GeneralPurpose Massively Parallel Array", European Conference on Circuit Theory and Design, ECCTD 2007, pp.8487, Seville, Spain, August 2007 C.AlonsoMontes, P.Dudek, D.L.Vilarino and M.G.Penedo, "On Chip implementation of a PixelParallel Approach for Retinal Vessel Tree Extraction", European Conference on Circuit Theory and Design, ECCTD 2007, pp.511514, Seville, Spain, August 2007 D.R.W.Barr, P.Dudek, J.Chambers and K.Gurney, “Implementation of Multilayer Leaky Integrator Networks on a Cellular Processor Array”, International Joint Conference on Neural Networks, IJCNN 2007, Orlando, Florida, pp.15601565, August 2007 J.H.B.Wijekoon and P.Dudek, "Spiking and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit", International Joint Conference on Neural Networks, IJCNN 2007, Orlando, Florida, pp.13321337, August 2007 (Best Paper Award) P.Dudek, "Vision Chips with PixelParallel Cellular Processor Arrays ", Information Technologies Conference, Gdansk University of Technology Faculty of ETI Annals, No.5, pp.18, May 2007 D.L.Vilarino and P.Dudek, "Evolution of Pixel Level Snakes Towards an Efficient Hardware Implementation ", IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.26782681, May 2007 J.H.B.Wijekoon and P.Dudek, “A simple analogue VLSI circuit of a cortical neuron”,”, IEEE International Conference on Electronics, Circuits and Systems, ICECS 2006, pp.13441347, December 2006 A.Lopich and P.Dudek, “A processing element for a digital asynchronous/synchronous vision chip”, IASTED International Conference on Circuits, Signals, and Systems CSS 2006, Acta Press, Proceedings vol.531, 6 pages, November 2006 A.Lopich and P.Dudek, “Global operations on SIMD cellular processor arrays: towards functional asynchronism”, International Workshop on Computer Architectures for Machine Perception and Sensing, CAMPS 2006, pp.1823, September 2006 P.Dudek, “Adaptive sensing and image processing with a generalpurpose pixelparallel sensor/processor array integrated circuit”, International Workshop on Computer Architectures for Machine Perception and Sensing, CAMPS 2006, pp.16, September 2006 D.R.W.Barr, S.J.Carey, A.Lopich and P.Dudek, “A Control System for a Cellular Processor Array”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.176181, Istanbul, August 2006 P.Dudek and D.L.Vilarino, “A Cellular Active Contours Algorithm Based on Region Evolution”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.269274, Istanbul, August 2006 P.Dudek, D.R.W.Barr, A.Lopich and S.J. Carey, “Demonstration of realtime image processing on the SCAMP3 vision system”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.1313, Istanbul, August 2006 D.L.Vilarino and P.Dudek, “Testing Pixel Level Snakes”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.1919, Istanbul, August 2006 P.Dudek and S.J.Carey, "A GeneralPurpose 128x128 SIMD Processor Array with Integrated Image Sensor", Electronics Letters, vol.42, no.12, pp.678679, June 2006 P.Dudek, "An Asynchronous Cellular Logic Network for TriggerWave Image Processing on FineGrain Massively Parallel Arrays", IEEE Transactions on Circuits and Systems  II, vol. 53, no.5, pp. 354358, May 2006 A.Lopich and P.Dudek, "Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing", IEEE International Symposium on Circuits and Systems, ISCAS 2006, pp.36183621, May 2006 V.D.Juncu, M.RafieiNaeini and P.Dudek , "Integrated circuit implementation of a compact discretetime chaos generator", Analogue Integrated Circuits and Signal Processing, Vol.46, Issue 3, pp.275280, March 2006 P.Dudek and V.D.Juncu, "An area and power efficient discretetime chaos generator circuit", European Conference on Circuit Theory and Design, ECCTD'05, Cork, Ireland, Vol. 2, pp. 8790, , 29 Aug  1 Sept 2005 A.Lopich and P.Dudek, "Architecture of Asynchronous Cellular Processor Array for Image Skeletonization", European Conference on Circuit Theory and Design, ECCTD'05, Cork, Ireland, Vol. 3, pp. 8184, 29 Aug  1 Sept 2005 P.Dudek, "Implementation of SIMD Vision Chip with 128x128 Array of Analogue Processing Elements", IEEE International Symposium on Circuits and Systems, ISCAS 2005, Kobe, pp.58065809 , May 2005 A.Lopich and P.Dudek, "Asynchronous Cellular Processor Array for Skeletonization of Binary Images", Conference on Postgraduate Research in Electronics, Photonics and Related Fields, PREP'2005, Lancaster, UK P.Dudek and P.J.Hicks, "A GeneralPurpose ProcessorperPixel Analog SIMD Vision Chip", IEEE Transactions on Circuits and Systems  I, vol. 52, no. 1, pp. 1320, January 2005 P.Dudek, "Fast and Efficient Implementation of TriggerWave Propagation on VLSI Cellular Processor Arrays", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2004, pp.117122, Budapest, July 2004 P.Dudek, "Accuracy and Efficiency of Greylevel Image Filtering on VLSI Cellular Processor Arrays", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2004, Budapest, pp.123128, Budapest, July 2004 P.Dudek, "A 39x48 GeneralPurpose FocalPlane Processor Array Integrated Circuit", IEEE International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, vol.V, pp.449452, May 2004 P.Dudek and V.D.Juncu, "Compact DiscreteTime Chaos Generator Circuit", Electronics Letters, Vol.39, No. 20, pp. 14311432, October 2003 P.Dudek, "A Flexible Global Readout Architecture for an Analogue SIMD Vision Chip", IEEE International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, vol.III, pp.782785, May 2003 P.Dudek, "A Processing Element for an Analogue SIMD Vision Chip", European Conference on Circuit Theory and Design, ECCTD'03, Krakow, Poland, vol.III, pp.221224, September 2003 P.Dudek and P.J.Hicks, "A GeneralPurpose Vision Chip with a ProcessorPerPixel SIMD Array", European Solid State Circuits Conference, ESSCIRC 2001, Villach, Austria, pp.228231, September 2001 P.Dudek and P.J.Hicks, "An analogue SIMD focalplane processor array", IEEE International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, vol.IV, pp.490493, May 2001 P.Dudek and P.J.Hicks, "A CMOS GeneralPurpose SampledData Analogue Processing Element", IEEE Transactions on Circuits and Systems  II: Analog and Digital Signal Processing, vol. 47, no. 5, pp. 467473, May 2000 P. Dudek, S. Szczepanski and J.V. Hatfield, "A HighResolution CMOS Time to Digital Converter Utilising a Vernier Delay Line", IEEE Journal of Solid State Circuits, vol.35, no.2, pp. 240 247, February 2000 P.Dudek and P.J.Hicks, "A CMOS GeneralPurpose SampledData Analogue Microprocessor", IEEE International Symposium on Circuits and Systems, ISCAS 2000, Geneva, Switzerland, vol.II, pp.417420, May 2000 P.Dudek and P.J.Hicks, "An SIMD Array of Analogue Microprocessors for Early Vision", Proceedings of the Conference on Postgraduate Research in Electronics, Photonics and Related Fields, PREP'99, Manchester, UK, pp.359362, February 1999, (Best Paper Award) P. Dudek and J.V. Hatfield, "A Zero DeadTime, High Temporal Resolution, TimeofFlight Particle Detector IC", Proceedings of the Eurosensors XI Conference, Warsaw, Poland, pp. 13411344, September 1997 