FINE3D:
The Fine-Grain Processor Arrays in 3D Silicon Technologies project, funded
by the EPSRC, investigates the design of cellular processor arrays for
next-generation silicon technologies, where many device layers can be
integrated in a single device. Wafer stacking and massive interconnect
achieved using through-silicon-vias provides both opportunities and design
challenges. We research processor architectures that make best use of the
available intra-layer bandwidth, investigate partitioning of the processing
circuitry amongst silicon layers, and look into heterogenous architectures
where different layers are fabricated using different technologies, most
suitable for individual system components. In particular, we are interested in
fine-grain processor arrays, which we believe provide architectural solution
that can fully exploit the benefits offered by the 3D integration.
REVERB: The
REVERB (Reverse
Engineering the Vertebrate Brain)
project is a multidisciplinary collaboration between a number of
universities, investigating integrative computation for autonomous agents,
based on action-selection architecture of the basal ganglia. We are
implementing low-level image processing required for this project, as well
as some neural models, currently using SCAMP-3 and developing new SCAMP-4
chip. We are also working towards an FPGA-based accelerator for neural
computation, to tackle the real-time embedded implementation on an
autonomous robot. We are developing the
APRON (Array Programming
Environment) software, as a front-end to the accelerator. The software is
also an efficient simulation tool on its own, furthermore it provides a
basis for platform-independent array processor interface, programming
language, and code compiler, and has been already adopted to work with SCAMP
and ASPA chips.
COLAMN: The
COLAMN (Computing
Architecture Based on Laminar Microcircuitry of the Neocortex)
project is a collaboration between neurobiologists, computational
neuroscientists and VLSI engineers, aiming at understanding the way cortical
circuits process information, and ultimately providing ideas for building
brain-inspired microelectronic circuits. We have developed an analogue
silicon neuron, which efficiently implements biologically plausible spiking
behaviour of cortical neurons. Currently we are investigating higher-level
cognitive models of the cortex, and their VLSI implementation.
more...
SCAMP:
The
SCAMP-3 is the latest in the family of pixel-per processor vision chips
using analogue processing elements. The chip can execute many image
processing algorithms in real-time with minimal power consumption. We have
developed a vision system based on the chip, and the devices are currently
used in a number of projects in our lab and in the labs of our collaborators
in the UK and overseas. The sensor/processor integration and massively
parallel operation provide a low-cost, low-power, high-performance
intelligent vision systems for robotics, surveillance, machine vision,
biomedical applications and research on algorithms for cellular processor
arrays. more...
Cellular
Asynchronous Arrays:
This project investigates design of vision chips
and fine-grain processor arrays based on novel control
schemes, where individual processors are triggered as data is available at
their neighbours, optimising speed and power consumption of the devices. The
aim is to provide image processing engines suitable for both low-level,
pixel-based operations (filtering, feature detection etc.) as well as more
global, object-based algorithms, such as object reconstruction, skeletonisation, watarshed transform, distance transform etc. The ASPA chip
contains a SIMD processor array, operating in mixed bit-serial/bit-parallel
mode, as well as a wave-propagating network. The work continues on next
generation of the ASPA processor in the Fine-Grain 3D project. more...
