I work on Resource Management and FPGA Virtualisation for Cloud computing, as a part of
Advanced Processor Technology group at The University of Manchester
and I am supervised by Dr. Dirk Koch and
Dr. James Garside.
My research focuses on transparent elastic resource sharing among hardware accelerators for maximising
resource utilisation, performance and energy efficiency. In other words, I work on scaling up and scaling out FPGA
accelerators for performance at run-time without the user realizing.
This would allow users to deploy their custom hardware accelerators written in OpenCL/C to the cloud with ease and high performance.
My CV can be found here.
Words I like to live by:
People of accomplishment rarely sat back and let things happen to them. They went out and happened to things. - Leonardo da Vinci
Teaching assistantCurrently, I am also a teaching assistant and proivde support for labs, marking and teaching (in labs).
PhD in Computer Science
At The University of Manchester, on Resource Management & FPGA Virtualisation for Cloud Computing as a President's Doctoral Scholar.Sep 2017 - Current
BEng (Hons) Computer Systems Engineering
At Univesity of Manchester with specialisation in Computer Architecture and System on Chip. Final year thesis can be found here.Sept 2014 - July 2017
Board member: School of Computer Science
Student representative on School board at University of Manchester.Oct 2014 - Jan 2017
ARM - Hardware Intern - Design and Verification
Part of Verification IP team working on AMBA protocols (CHI, ACE, AXI) and its future variants.July 2016 - Sept 2016
Undergraduate Research Assistant
Worked on Transport triggered and Dataflow Computer Architecture under Dr. Javier Navaridas.July 2015 - Aug 2015
- [Accepted/In press] A. Vaishnav, K.D. Pham and D. Koch, "Live Migration for OpenCL FPGA Accelerators", International Conference on Field-Programmable Technology (FPT), Naha, 2018. (Best Paper Nominee) Read Online
- K.D. Pham, A. Vaishnav, M. Vesper, D. Koch, "ZUCL: A ZYNQ UltraScale+ Framework for OpenCL HLS Applications", In Fifth International Workshop on FPGAs for Software Programmers (FSP 2018), 2018. Read Online
- K.D. Pham, E. Horta, D. Koch, A. Vaishnav, T. Kuhn, "IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs", 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-2018), 2018. Read Online
- A. Vaishnav, K.D. Pham, D. Koch and J. Garside, "Resource Elastic Virtualization for FPGAs using OpenCL", 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, 2018. Read Online
- A. Vaishnav, K.D. Pham and D. Koch, "A Survey on FPGA Virtualization", 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, 2018. Read Online
- A. Vaishnav, J. R. G. Ordaz and D. Koch, "A security library for FPGA interlays", 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, 2017. Read Online
Honours and Awards
- Given to top 3% of research students who demonstrate academic excellence and leadership potential, university-wide.
- This prize is awarded to the student who has, in the opinion of the Examiners, performed with distinction throughout their degree programme in examinations, laboratories and projects relating to Computer Engineering.
- For the sterling performance of the team throughout the year in all coursework and challenges of Software Engineering.
- Awarded on the grounds of academic merit to a student who has shown commitment, determination, enthusiasm, personal application and promise.
- For Excellence in first year studies in academic year 2014-15. Given to top 5 students of the year.
- Member of Organising Committee for Postgraduate Summer Research Showcase.
In 2017 we had just over 160 posters on display from across the three faculties, a research image gallery, research films and 12 interactive posters on show.
- Learning about Psychology and Economics.
- Nature and Still life Photography using phone camera. (Catch me on Instagram for latest updates.)
- Playing chess.
- Long walks.