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A.Lopich and P.Dudek, "A SIMD Cellular Processor Array Vision Chip With Asynchronous Processing Capabilities", IEEE Transactions on Circuits and Systems - I, vol 58, issue 10, pp. 2420-2431, October 2011
A.Lopich and P.Dudek, "Architecture and Design of a Programmable 3D-Integrated Cellular Processor Array for Image Processing", IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-Soc 2011, 3-5 October 2011, Hong Kong
A.Lopich and P.Dudek, "Asynchronous Cellular Logic Network as a Co-Processor for a General-Purpose Massively Parallel Array", International Journal of Circuit Theory and Applications, Volume 39, Issue 9, pages 963–972, September 2011
S.Carey, D.R.W.Barr and P.Dudek, "Demonstration of a Low Power Image Processing System using a SCAMP3 Vision Chip", ACM/IEEE International Conference on Distributed Smart Cameras, ICDSC 2011, 22-25 August 2011, Ghent
T.Zhou, P.Dudek and B.Shi, "Self-Organizing Neural Population Coding for Improving Robotic Visuomotor Coordination", International Joint Conference on Neural Networks, IJCNN 2011, San Jose, California, 31 July-5 August 2011
G.Indiveri, B.Linares-Barranco, T.J.Hamilton, A.van Schaik, R.Etienne-Cummings, T.Delbruck, S.C.Liu, P.Dudek, P.Häfliger, S.Renaud, J.Schemmel, G.Cauwenberghs, J.Arthur, K.Hynna, F.Folowosele, S.Saighi, T.Serrano-Gotarredona, J.Wijekoon, Y.Wang and K.Boahen, "Neuromorphic Silicon Circuits", Frontiers in Neuroscience, 5:73. pp 1-23, doi: 10.3389/fnins.2011.00073, 2011
P.Dudek, “SCAMP-3: A Vision Chip with SIMD Current-mode Analogue Processor Array”, in “Focal-Plane Sensor-Processor Chips” A.Zarandy (Ed.), ISBN: 978-1-4419-6474-8, p.17-43, Springer, 2011
A.Lopich and P.Dudek, “ASPA: Asynchronous-Synchronous Focal Plane Sensor Processor Chip”, in “Focal-Plane Sensor-Processor Chips” A.Zarandy (Ed.), ISBN: 978-1-4419-6474-8, p.73-104, Springer, 2011
S.Carey, A.Lopich and P.Dudek, "A Processor Element for a Mixed Signal Cellular Processor Array Vision Chip", IEEE International Symposium on Circuits and Systems, ISCAS 2011, Rio de Janeiro, May 2011
J.H.B.Wijekoon and P.Dudek,"Analogue CMOS Circuit Implementation of a Dopamine Modulated Synapse", IEEE International Symposium on Circuits and Systems, ISCAS 2011, Rio de Janeiro, May 2011
A.Lopich, D.Barr, B.Wang and P.Dudek, "Real-Time Image Processing on ASPA2 Vision System", IEEE International Symposium on Circuits and Systems, ISCAS 2011, Rio de Janeiro, May 2011 (Best Demo Award)
P.Abshire, A.Bermak, R.Berner, G.Cauwenberghs, S.Chen, J.B.Christen, T.Constandinou, E.Curulciello, M.Dandin, T.Datta, T.Delbruck, P.Dudek, A.Eftekhar, R.Etienne-Cummings, G.Indiveri, M.K.Law, B.Linares-Barranco, J.Tapson, W.Tang Y.Zhai, "Confession Session: Learning from Others Mistakes", IEEE International Symposium on Circuits and Systems, ISCAS 2011, Rio de Janeiro, pp 1149-1162, May 2011
A.Lopich, P.Dudek, "Cellular Processor Array Design in 3D Integrated Circuit Technology", Workshop on 3D integration, Design, Automation and Test in Europe, DATE 2011, Geneva, March 2011
K.Brohan, A.Cope, K.Gurney and P.Dudek, "Reinforcement learning in a self-organised representation of feature space", Tenth International Conference on Epigenetic Robotics, EpiRob 2010, Örenäs Slott, Sweden, 5-7 November 2010
K.Brohan, K.Gurney and P.Dudek, "Using reinforcement learning to guide the development of self-organised feature maps for visual orienting", Artificial Neural Networks - ICANN 2010, Lecture Notes in Computer Science, Volume 6353/2010, pp.180-189, September 2010
A.Cope, J.Chambers, D.Barr, P.Dudek and K.Gurney, "Systems level model integration and embodiment: a case study with gaze control", Bernstein Conference on Computational Neuroscience, BCCN 2010, Berlin, September 2010
A.Lopich and P.Dudek, "An 80×80 general-purpose digital vision chip in 0.18 μm CMOS technology", IEEE International Symposium on Circuits and Systems, ISCAS 2010, pp 4257-4260, May 2010
P.Dudek, A.Lopich and V.Gruev, “Vision Sensor with a SIMD Processor Array in a Vertically Stacked 3D Integrated Circuit Technology”, Workshop on 3D integration, Design, Automation and Test in Europe, DATE 2010, Dresden, March 2010.
M.Geese and P.Dudek, "Autonomous Long Distance Transfer on SIMD Cellular Processor Arrays", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 365-370, February 2010 (Best Paper Award)
S.Mandal, B.Shi and P.Dudek, "Binocular Disparity Calculation on a Massively-Parallel Analog Vision Processor", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 285-289, February 2010
S.Razmjooei and P.Dudek, "Approximating Euclidean Distance Transform with Simple Operations in Cellular Processor Arrays", IEEE Workshop on Cellular Nanoscale Networks and Applications, CNNA 2010, Berkeley, pp. 181-185, February 2010
Y.Wang, T.Wu, G.Orchard, P.Dudek, M.Rucci and B.Shi, "Hebbian Learning of Visually Directed Reaching by a Robot Arm", IEEE Biomedical Circuits and Systems Conference, BioCAS 2009, pp.205-208, 2009
J.H.B.Wijekoon and P.Dudek, "A CMOS circuit implementation of a spiking neuron with bursting and adaptation on a biological timescale", IEEE Biomedical Circuits and Systems Conference, BioCAS 2009, pp.193-196, December 2009
D.R.W.Barr and P.Dudek, "APRON: A Cellular Processor Array Simulation and Hardware Design Tool”, EURASIP Journal on Advances in Signal Processing, Article ID 751687, 9 pages, 2009
P.Dudek, A.Lopich and V.Gruev, “A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology”, European Conference on Circuit Theory and Design, ECCTD 2009, pp.193-197, August 2009
A.Lopich and P.Dudek, Hardware Implementation of Skeletonization Algorithm for Parallel Asynchronous Image Processing, Journal of Signal Processing Systems, Springer, Volume 56, Number 1, pp. 91-103, July 2009
J.Harkin, F.Morgan, S.Hall. P.Dudek, T.Dowrick and L.McDaid, "Reconfigurable Platforms and the Challenges for Large-Scale Implementations of Spiking Neural Networks", IEEE International Conference on Field Programmable Logic and Applications, FPL 2008, pp.483-486, September 2008
D.R.W.Barr and P.Dudek, "A Cellular Processor Array Simulation and Hardware Prototyping Tool", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.213-218, July 2008 (Best Paper Award)
D.R.W.Barr and P.Dudek, "Demonstration of the APRON Processor Array Simulation Software", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.2-2, July 2008
D.Hillier and P.Dudek, "Implementing the Grayscale Wave Metric on a Cellular Array Processor Chip", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2008, pp.120-124, July 2008
C.Alonso-Montes, D.L.Vilariño, P. Dudek and M.G.Penedo, "Fast Retinal Vessel Tree Extraction: A Pixel Parallel Approach", International Journal of Circuit Theory and Applications, vol 36, issue 5-6, pp.641-651, July-September 2008
M.Huelse, D.R.W.Barr and P.Dudek, "Cellular Automata and Non-static Image Processing for Embodied Robot Systems on a Massively Parallel Processor Array", Automata-2008, Theory and Applications of Cellular Automata, pp.504-513, Luniver Press, 2008.
J.H.B.Wijekoon and P.Dudek, "Integrated Circuit Implementation of a Cortical Neuron", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 1784-1788, May 2008
A.Lopich and P.Dudek, "ASPA: Focal Plane Digital Processor Array with Asynchronous Processing Capabilities", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 1592-1596, May 2008
D.L.Vilariño, P.Dudek, D.Cabello, "Focal-Plane Moving Object Segmentation for Real-Time Video Surveillance", IEEE International Symposium on Circuits and Systems, ISCAS 2008, pp 1600-1603, May 2008
J.H.B.Wijekoon and P.Dudek, "Compact Silicon Neuron Circuit with Spiking and Bursting Behaviour", Neural Networks, Vol 21, Number 2-3, pp 524-534, March/April 2008
A.Lopich and P.Dudek, "Implementation of an Asynchronous Cellular Logic Network as a Co-Processor for a General-Purpose Massively Parallel Array", European Conference on Circuit Theory and Design, ECCTD 2007, pp.84-87, Seville, Spain, August 2007
C.Alonso-Montes, P.Dudek, D.L.Vilarino and M.G.Penedo, "On Chip implementation of a Pixel-Parallel Approach for Retinal Vessel Tree Extraction", European Conference on Circuit Theory and Design, ECCTD 2007, pp.511-514, Seville, Spain, August 2007
D.R.W.Barr, P.Dudek, J.Chambers and K.Gurney, “Implementation of Multi-layer Leaky Integrator Networks on a Cellular Processor Array”, International Joint Conference on Neural Networks, IJCNN 2007, Orlando, Florida, pp.1560-1565, August 2007
J.H.B.Wijekoon and P.Dudek, "Spiking and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit", International Joint Conference on Neural Networks, IJCNN 2007, Orlando, Florida, pp.1332-1337, August 2007 (Best Paper Award)
P.Dudek, "Vision Chips with Pixel-Parallel Cellular Processor Arrays ", Information Technologies Conference, Gdansk University of Technology Faculty of ETI Annals, No.5, pp.1-8, May 2007
D.L.Vilarino and P.Dudek, "Evolution of Pixel Level Snakes Towards an Efficient Hardware Implementation ", IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.2678-2681, May 2007
J.H.B.Wijekoon and P.Dudek, “A simple analogue VLSI circuit of a cortical neuron”,”, IEEE International Conference on Electronics, Circuits and Systems, ICECS 2006, pp.1344-1347, December 2006
A.Lopich and P.Dudek, “A processing element for a digital asynchronous/synchronous vision chip”, IASTED International Conference on Circuits, Signals, and Systems CSS 2006, Acta Press, Proceedings vol.531, 6 pages, November 2006
A.Lopich and P.Dudek, “Global operations on SIMD cellular processor arrays: towards functional asynchronism”, International Workshop on Computer Architectures for Machine Perception and Sensing, CAMPS 2006, pp.18-23, September 2006
P.Dudek, “Adaptive sensing and image processing with a general-purpose pixel-parallel sensor/processor array integrated circuit”, International Workshop on Computer Architectures for Machine Perception and Sensing, CAMPS 2006, pp.1-6, September 2006
D.R.W.Barr, S.J.Carey, A.Lopich and P.Dudek, “A Control System for a Cellular Processor Array”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.176-181, Istanbul, August 2006
P.Dudek and D.L.Vilarino, “A Cellular Active Contours Algorithm Based on Region Evolution”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.269-274, Istanbul, August 2006
P.Dudek, D.R.W.Barr, A.Lopich and S.J. Carey, “Demonstration of real-time image processing on the SCAMP-3 vision system”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.13-13, Istanbul, August 2006
D.L.Vilarino and P.Dudek, “Testing Pixel Level Snakes”, IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA 2006, pp.19-19, Istanbul, August 2006
P.Dudek and S.J.Carey, "A General-Purpose 128x128 SIMD Processor Array with Integrated Image Sensor", Electronics Letters, vol.42, no.12, pp.678-679, June 2006
P.Dudek, "An Asynchronous Cellular Logic Network for Trigger-Wave Image Processing on Fine-Grain Massively Parallel Arrays", IEEE Transactions on Circuits and Systems - II, vol. 53, no.5, pp. 354-358, May 2006
A.Lopich and P.Dudek, "Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing", IEEE International Symposium on Circuits and Systems, ISCAS 2006, pp.3618-3621, May 2006
V.D.Juncu, M.Rafiei-Naeini and P.Dudek , "Integrated circuit implementation of a compact discrete-time chaos generator", Analogue Integrated Circuits and Signal Processing, Vol.46, Issue 3, pp.275-280, March 2006
P.Dudek and V.D.Juncu, "An area and power efficient discrete-time chaos generator circuit", European Conference on Circuit Theory and Design, ECCTD'05, Cork, Ireland, Vol. 2, pp. 87-90, , 29 Aug - 1 Sept 2005
A.Lopich and P.Dudek, "Architecture of Asynchronous Cellular Processor Array for Image Skeletonization", European Conference on Circuit Theory and Design, ECCTD'05, Cork, Ireland, Vol. 3, pp. 81-84, 29 Aug - 1 Sept 2005
P.Dudek, "Implementation of SIMD Vision Chip with 128x128 Array of Analogue Processing Elements", IEEE International Symposium on Circuits and Systems, ISCAS 2005, Kobe, pp.5806-5809 , May 2005
A.Lopich and P.Dudek, "Asynchronous Cellular Processor Array for Skeletonization of Binary Images", Conference on Postgraduate Research in Electronics, Photonics and Related Fields, PREP'2005, Lancaster, UK
P.Dudek and P.J.Hicks, "A General-Purpose Processor-per-Pixel Analog SIMD Vision Chip", IEEE Transactions on Circuits and Systems - I, vol. 52, no. 1, pp. 13-20, January 2005
P.Dudek, "Fast and Efficient Implementation of Trigger-Wave Propagation on VLSI Cellular Processor Arrays", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2004, pp.117-122, Budapest, July 2004
P.Dudek, "Accuracy and Efficiency of Grey-level Image Filtering on VLSI Cellular Processor Arrays", IEEE Workshop on Cellular Neural Networks and their Applications, CNNA 2004, Budapest, pp.123-128, Budapest, July 2004
P.Dudek, "A 39x48 General-Purpose Focal-Plane Processor Array Integrated Circuit", IEEE International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, vol.V, pp.449-452, May 2004
P.Dudek and V.D.Juncu, "Compact Discrete-Time Chaos Generator Circuit", Electronics Letters, Vol.39, No. 20, pp. 1431-1432, October 2003
P.Dudek, "A Flexible Global Readout Architecture for an Analogue SIMD Vision Chip", IEEE International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, vol.III, pp.782-785, May 2003
P.Dudek, "A Processing Element for an Analogue SIMD Vision Chip", European Conference on Circuit Theory and Design, ECCTD'03, Krakow, Poland, vol.III, pp.221-224, September 2003
P.Dudek and P.J.Hicks, "A General-Purpose Vision Chip with a Processor-Per-Pixel SIMD Array", European Solid State Circuits Conference, ESSCIRC 2001, Villach, Austria, pp.228-231, September 2001
P.Dudek and P.J.Hicks, "An analogue SIMD focal-plane processor array", IEEE International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, vol.IV, pp.490-493, May 2001
P.Dudek and P.J.Hicks, "A CMOS General-Purpose Sampled-Data Analogue Processing Element", IEEE Transactions on Circuits and Systems - II: Analog and Digital Signal Processing, vol. 47, no. 5, pp. 467-473, May 2000
P. Dudek, S. Szczepanski and J.V. Hatfield, "A High-Resolution CMOS Time to Digital Converter Utilising a Vernier Delay Line", IEEE Journal of Solid State Circuits, vol.35, no.2, pp. 240- 247, February 2000
P.Dudek and P.J.Hicks, "A CMOS General-Purpose Sampled-Data Analogue Microprocessor", IEEE International Symposium on Circuits and Systems, ISCAS 2000, Geneva, Switzerland, vol.II, pp.417-420, May 2000
P.Dudek and P.J.Hicks, "An SIMD Array of Analogue Microprocessors for Early Vision", Proceedings of the Conference on Postgraduate Research in Electronics, Photonics and Related Fields, PREP'99, Manchester, UK, pp.359-362, February 1999, (Best Paper Award)
P. Dudek and J.V. Hatfield, "A Zero Dead-Time, High Temporal Resolution, Time-of-Flight Particle Detector IC", Proceedings of the Eurosensors XI Conference, Warsaw, Poland, pp. 1341-1344, September 1997
